Computer Architecture

Write a short note on general register organization.

General register organization.

Memory locations are required for storing return addresses, partial products, pointers, counters, and temporary results during multiplication. Memory access is the time consuming operation in a computer so such applications are time consuming. It is more efficient and convenient to contain these intermediate values in processor registers. The registers communicate with each other not only for performing various microoperation but also while direct data transfers. For seven CPU registers, a bus organization is shown in fig.

In fig., the output of each register is connected to two multiplexers to form the two buses A and B. For a specific bus the selection times in each multiplexer choose one register or the input data. The A and B buses form the inputs to a common arithmetic logic unit. The operation chosen in the ALU determines the arithmetic or logic microoperation that is to be performed. Micro Operation result is available for output data and also goes into the inputs of all the registers. A decoder selects the register which gets the information from the output bus. The decoder activates one of the register load inputs, hence providing a transfer path between the data in the output bus and the inputs of the selected destination register.

The control unit that operates the CPU bus system directs the information flow through the registers and ALU by selecting the various components in the system.

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